Hardware accelerator for efficient convolution processing

Abstract

An accelerator with a modified kernel design for convolution processing in a Convolutional Neural Network (CNN) model is disclosed wherein the convolution execution time is reduced. A kernel structure is disclosed in the embodiment for the convolution operations that improves the overall performance of a CNN. Further, two loading units for weight and pixel loading reduce the latency involved in loading the network parameters into the processing elements. Moreover, a controller has been designed and included in the system architecture to aid the functioning of loading units efficiently.