Hardware Accelerator For Efficient Convolution Processing
| dc.contributor.author | Naidu, Prakash Crj | |
| dc.contributor.author | Hazarika, Anakhi | |
| dc.contributor.author | Poddar, Soumyajit | |
| dc.contributor.author | Rahaman, Hafizur | |
| dc.date.accessioned | 2022-02-08T11:10:49Z | |
| dc.date.available | 2022-02-08T11:10:49Z | |
| dc.date.issued | 2020-08-20 | |
| dc.description.abstract | An accelerator with a modified kernel design for convolution processing in a Convolutional Neural Network ( CNN ) model is disclosed wherein the convolution execution time is reduced. | en_US |
| dc.identifier.citation | Prakash Crj Naidu Soumyajit Poddar Hardware Accelerator For Efficient Convolution Processing | en_US |
| dc.identifier.uri | http://hdl.handle.net/123456789/5166 | |
| dc.language.iso | en | en_US |
| dc.publisher | United States ( 12 ) Patent Application Publication ( 10 ) Pub . No .: US 2020/0264935 A1 PODDAR et al | en_US |
| dc.subject | Convolutional Neural Network (CNN) | en_US |
| dc.title | Hardware Accelerator For Efficient Convolution Processing | en_US |
| dc.type | Other | en_US |